HSR-PRP Switch (HPS) is an IP Core for the implementation of High-availability Seamless Redundancy and Parallel Redundancy Protocol standards for Reliable Ethernet communications. HSR-PRP Switch is a full hardware solution that can be implemented on a low-cost FPGA.

Managed Ethernet Switch (MES) is an Ethernet switch IP Core that features a non-blocking crossbar matrix that allows continuous transfers between all the ports. Implementing a Store & Forward switching approach, the switch buffers and verifies each frame before forwarding it. Besides, the latency time is in the order of nanoseconds. So, MES is the perfect switch to implement Ethernet based Industrial Networks.

IEC 61850/62351 Substation Automation Systems Cryptographic (SASCrypt)  IP Core secures the strict real-time traffic used in the Substation Automation Systems and in new Smart Grid premises. This IP implements the new IEC 62351-6 standard that ensures interoperability and allows coexisting IEC 61850 protected and non protected traffic in the same network. This standard defines the encryption and authentication mechanisms that shall be applied to Layer 2 IEC 61850 frames. This low-latency IP Core is capable of encrypting, decrypting and authenticating GOOSE or SMV at wire-speed.

1588Tiny is a IEEE1588-2008 V2 Slave Only hard-only compliant clock synchronization IP core for Xilinx FPGAs. It is focused on equipments that requires basic IEEE 1588 functionality using the minimum resources. 1588Tiny is capable of accurately time-stamping IEEE 1588 telegrams and also provides a synchronized clock using only hardware modules.

Multiport Time Sensitive Networking (MTSN) Switch IP core is a flexible HDL code ready to generate TSN end-point or bridge implementations. This IP Core is provided with a rich set of Generic parameters in order to obtain the best functionalities resources trade-off. This configuration of the TSN IP Core can be done through the Vivado GUI.