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J-Link Debug Probes

SEGGER J-Links are the most widely used line of debug probes available today. They've been proven for more than 10 years with over 250,000 units sold, including OEM versions and on-board solutions. This popularity stems from the unparalleled performance, extensive feature set, large number of supported CPUs, and compatibility with all popular development environments.

With up to 3 MBytes/s download speed to RAM and record breaking flashloaders, as well as the ability to set an unlimited number of breakpoints in flash memory of MCUs, the J-Link debug probes are undoubtedly the best choice to optimize your debugging and flash programming experience.

J-Link debug probes support all ARM 7/9/11, Cortex™, Renesas RX™ CPUs and are supported by all major IDEs such as IAR EWARM, Keil MDK,Rowley CrossWorks, Atollic TrueSTUDIO, IAR EWRX,Renesas HEW, Renesas e2studio, including GDB based IDEs, and many others.

Debug smarter and faster with J-Link debug probes!

 
     
 

Hardware features

Hardware features like Ethernet interface, USB full- / high-speed interface, etc. are J-Link model specific features which can not be updated or changed by software updates.

 
 
  J-Link BASE J-Link PLUS J-Link ULTRA+ J-Link PRO J-Trace for Cortex-M J-Trace ARM
Download speed
into RAM1
1.0 MByte/sec 1.0 MByte/sec 3.0 MByte/sec 3.0 MByte/sec 3.0 MByte/sec 1.0 MByte/sec
Max. target interface speed 15 MHz 15 MHz 50 MHz 50 MHz 25 MHz 12 MHz
Max. SWO speed 7.5 MHz 7.5 MHz 100 MHz 100 MHz 25 MHz -
USB Correct tick Correct tick Correct tick Correct tick Correct tick Correct tick
Ethernet Incorrect Cross Mark Incorrect Cross Mark Incorrect Cross Mark Correct tick Incorrect Cross Mark Incorrect Cross Mark
JTAG interface Correct tick Correct tick Correct tick Correct tick Correct tick Correct tick
SWD interface Correct tick Correct tick Correct tick Correct tick Correct tick Incorrect Cross Mark
SWO interface Correct tick Correct tick Correct tick Correct tick Correct tick Incorrect Cross Mark
Microchip ICSP�
interface
Correct tick Correct tick Correct tick Correct tick Incorrect Cross Mark Incorrect Cross Mark
Renesas FINE interface Correct tick Correct tick Correct tick Correct tick Incorrect Cross Mark Incorrect Cross Mark
ETM Trace Incorrect Cross Mark Incorrect Cross Mark Incorrect Cross Mark Incorrect Cross Mark Correct tick Correct tick
ETB Trace Correct tick Correct tick Correct tick Correct tick Correct tick Incorrect Cross Mark
 
     
 

Key:

 
 
Correct tick

Included

     
Incorrect Cross Mark

Not Included

     
 
     
     
     
 

Software features

Software features are features implemented in the software primarily on the host. Software features can either come with the J-Link or be added later using a license string from Segger.

 
 
  J-Link BASE J-Link PLUS J-Link ULTRA+ J-Link PRO J-Trace for Cortex-M J-Trace ARM
GDB Server Correct tick Correct tick Correct tick Correct tick Correct tick Correct tick
Flash Download2 Correct tick Correct tick Correct tick Correct tick Correct tick Correct tick
Unlimited Flash Breakpoints3 Yellow Tick Mark Correct tick Correct tick Correct tick Correct tick Correct tick
J-Flash Yellow Tick Mark Correct tick Correct tick Correct tick Correct tick Correct tick
RDI Yellow Tick Mark Correct tick Correct tick Correct tick Correct tick Correct tick
RDDI Yellow Tick Mark Correct tick Correct tick Correct tick Correct tick Correct tick
 
     
 

Key:

 
 
Correct tick

Included

Yellow Tick Mark

Optional, an additional license is required

 
     
     
     
 

Supported cores

Support for additional / new cores may be added to existing J-Link models with a new firmware version as far as the exisiting J-Link hardware allows it.

 
 
  J-Link BASE J-Link PLUS J-Link ULTRA+ J-Link PRO J-Trace for Cortex-M J-Trace ARM

ARM legacy cores

ARM7 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Green Debug IconIcon trace
ARM9 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Green Debug IconIcon trace
ARM11 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark

ARM Cortex cores

Cortex-A5 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-A7 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-A8 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-A9 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-A12 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-A15 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-A17 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-MO Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark
Cortex-MO+ Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark
Cortex-M1 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark
Cortex-M3 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug IconIcon trace Incorrect Cross Mark
Cortex-M4 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug IconIcon trace Incorrect Cross Mark
Cortex-M7 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug IconIcon trace Incorrect Cross Mark
Cortex-R4 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Cortex-R5 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
SC000 (M0 secure) Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark
SC300 (M3 secure) Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Green Debug IconIcon trace Incorrect Cross Mark

Microchip PIC32

Microchip PIC32MX Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Microchip PIC32MZ Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark

Renesas RX

Renesas RX110 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX111 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX210 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX21A Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX220 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX610 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX621 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX62G Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX62N Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX62T Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX630 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX631 Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX63N Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
Renesas RX63T Green Debug Icon Green Debug Icon Green Debug Icon Green Debug Icon Incorrect Cross Mark Incorrect Cross Mark
 
     
 

Key:

 
 
Green Debug Icon

Debug support: Run control, memory access, etc

Icon trace

Trace supported

Incorrect Cross Mark

Not supported

 
     
 
    For use from within an IDE Best value: Includes all software enhancements and maximum performance


Educational use
 

    Price does not include VAT or Sales Tax which may be applicable in some regions Cortex-M3,4 cores only ARM 7/9 cores only The download speeds listed here are the peak download speeds that can be achieved by the particular J-Link model.The actual download speed may be lower as it depends on various factors, such as, but not limited to: The selected debug interface & speed, the CPU core and its operating frequency, other devices in the JTAG chain in case JTAG is used as target interface.
 
     
 

For customers who want to build their own applications using J-Link, and for IDE vendors who implement J-Link support for their IDE, SEGGER offers a J-Link SDK which comes with the J-Link DLL + API documentation + implementation samples. The SDK is available for Windows and Linux.

Remote Server Debugging in Tunnel Mode

The J-Link Remote Server effortlessly debugs target hardware and application in remote locations over TCP/IP as if the target was on the developer's desk. Taking this concept to the next level, SEGGER offers a tunnel mode for remote debugging anywhere in the world.

Tunnel mode initiates the connection sending the serial number of the J-Link to the tunnel server. The J-Link DLL then is capable of creating a tunnel connection via the server just by using the serial number of the target J-Link.
Support engineers can debug unwieldy hardware at the customer's site without having to travel there, just by sending a J-Link. Distributed development teams can share early prototypes even in remote locations.

 
     
 
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  RTT with Segger J-Link  
 

SEGGER announces J-Link Real Time Terminal (RTT) which speeds up bidirectional communication between the target system and the development computer by at least an order of magnitude. This new technology brings printf-style debugging and system verification functionality to any application. The only thing needed to use J-Link RTT is a CPU with a debug interface that allows background memory access; no extra pins are required.

 
     
 
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  J-Scope with J-Link for Data Visualization  
 

SEGGER announces J-Scope, their new data visualization software for the industry standard J-Link family of debug probes. J-Scope is an application to analyze and visualize data on a microcontroller in real-time, while the target is running. It providesa real-time, accurate representation of the sampled variables enabling the engineer to better understand the embedded application.

J-Scope is based on the newly introduced J-Link HSS (High Speed Sampling) feature, which makes it possible to continuously sample variables at extremely high speeds without affecting the real-time nature of the embedded device. Using the standard debug interface, it does not require any extra resources on the target such as memory, CPU time or extra pins.

 
     
 
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