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How MoRe supports you:
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1. Create or remove cross-hierarchy
signals
Creating or removing signal paths across the subsystem hierarchy is, in the case of
far-reaching signals, time-consuming and error-prone. With MoRe, you can add or remove
these types of signals with a single action. Simply choose the source signal and a
destination port, and MES Model & Refactor® will automatically
create/remove all necessary inports, outports, and signals lines.
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2. Improve subsystem decomposition
With MoRe, you can quickly and easily revise the decomposition of your model into
subsystems without changing the functionality of your model. This allows you, via
individual actions, to move blocks that are already connected into subsystems or out
of subsystems. Additionally, you can divide a subsystem in two or merge two subsystems
into one with a single action.
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3. Rearrange subsystem interfaces
Rearranging subsystem interfaces is supported by MoRe through various actions. For
instance, you can change the order of the subsystem's ports from outside in a dialog.
Renaming ports and signals from outside is also possible – a function that has only
been available in Simulink® since R2017a for inports and R2018b for
outports.
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4. Create and decompose buses
With MoRe, you can create buses from already connected signals quickly and easily.
This is a common but time-consuming work step when reworking subsystem interfaces. In
one action, MoRe automatically creates the bus creator and bus selector blocks and
signal lines needed for this. In addition, you can use MoRe to add new signals to
buses and split or merge bus selectors.
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5. Analyze dataflow
MoRe offers various actions to analyze and visualize dataflow in
Simulink®. For instance, you can highlight all signal paths that have
an influence on a selected signal with one action. This corresponds to the slicing of
the model and makes it possible to analyze which input variables of a subsystem have
an influence on an output variable. In addition, MoRe can be used to quickly and
easily navigate to a signal's source blocks or destination blocks.
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